Lead-on-chip semiconductor packaging structures use a lead frame that extends over and is adhesively joined to the surface of the integrated circuit chip. The lead frame has numerous bond fingers to carry signals between the chip and external circuitry. The bond fingers electrically connect via numerous bonding wires to bond pads typically located in a center row of the chip's top surface. In most lead frame configurations, the bond fingers appear on two sides of the bond pads. In lead-on-chip packages, a double-sided adhesive tape is used to attach the bond fingers to the chip and provide insulation between the chip and bond fingers. An advantage of this type of configuration is that power buses for the circuitry of the integrated circuit chip may be located external to the chip. In other words, the power buses may be part of the lead frame design. One merit of this packaging concept is that the power buses of the circuitry can be located external to the chip as part of the lead frame design. This reduces the chip size and improves the plastic-to-silicon ratio in the lead-on-chip package. The buses run alongside the bond pads. Connections between the bond pads and the bond fingers are, therefore, made by routing the bonding wires around the buses.
More modern lead-on-chip configurations avoid the use of bonding wires and, instead, connect bond fingers from a lead frame directly to the bond pads on the chip. Techniques that use these configurations are called inner lead bonding or ILB techniques. Power buses that run alongside the bond pads and must be routed around limit the ability to employ ILB techniques. With the power bus obstructing access to the bonding pads of the integrated circuit, it is not possible to easily access the bond pads with ILB lead frames.
There is a need, therefore, for a method to employ inner lead bonding techniques on an integrated circuit chip that uses lead-on-chip packaging.
There is a need for an apparatus that functions as a power bus for an integrated circuit chip and that permits an inner leading bonding adaptation to a lead-on-chip lead frame configuration.